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Articles by Topics
Topic B. - Hardware
Topic B.2 - ARITHMETIC AND LOGIC STRUCTURES
Topic B.2.2 - Performance Analysis and Design Aids

M.P.M. Araujo, N. Nedjah, L. de Macedo Mourelle:
Quantum-Inspired Evolutionary State Assignment for Synchronous Finite State Machines
/jucs_14_15/quantum_inspired_evolutionary_state
page 2532 - 2548
Vol.14 / Issue 15
J.M. Chaves-González, M.A. Vega-Rodríguez, J.A. Gómez-Pulido, J.M. Sánchez-Pérez:
Pipeline-scheduling Simulator for Educational Purpose
/jucs_13_7/pipeline_scheduling_simulator_for
page 959 - 969
Vol.13 / Issue 7
W. Mayerwieser, K. C. Posch, R. Posch, V. Schindler:
Testing a High-Speed Data Path The Design of the RSAb Crypto Chip
/jucs_1_11/testing_a_high_speed
page 728 - 743
Vol.1 / Issue 11
O. Pérez, Y. Berviller, C. Tanougast, S. Weber:
The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation
/jucs_13_3/the_use_of_runtime
page 349 - 362
Vol.13 / Issue 3
M. Sheeran:
Hardware Design and Functional Programming: a Perfect Match
/jucs_11_7/hardware_design_and_functional
page 1135 - 1158
Vol.11 / Issue 7