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Articles by Topics
Topic C. - Computer Systems Organization
Topic C.1 - PROCESSOR ARCHITECTURES
Topic C.1.3 - Other Architecture Styles

R. Banach:
MONSTR I - Fundamental Issues and the Design of MONSTR
/jucs_2_4/monstr_i_fundamental_issues
page 164 - 216
Vol.2 / Issue 4
E. Cantó, M. Fons, F. Fons, M. López, R. Ramos:
Fast Self-Reconfigurable Embedded System on Spartan-3
/jucs_19_3/fast_self_reconfigurable_embedded
page 301 - 324
Vol.19 / Issue 3
J. Díaz, E. Ros, R. Rodriguez-Gomez, B. del Pino:
Real-time Architecture for Robust Motion Estimation under Varying Illumination Conditions
/jucs_13_3/real_time_architecture_for
page 363 - 376
Vol.13 / Issue 3
P. Evripidou, C. Kyriacou:
Data Driven Network Of Workstations (D²NOW)
/jucs_6_10/data_driven_network_of
page 1015 - 1033
Vol.6 / Issue 10
A. Gecow, M. Nowostawski, M. Purvis:
Structural Tendencies in Complex Systems Development and their Implication for Software Systems
/jucs_11_2/structural_tendencies_in_complex
page 327 - 356
Vol.11 / Issue 2
K. Kavi, J. Arul, R. Giorgi:
Execution and Cache Performance of the Scheduled Dataflow Architecture
/jucs_6_10/execution_and_cache_performance
page 948 - 967
Vol.6 / Issue 10
L. Prechelt:
The Forum for Negative Results (FNR)
Guest Editorial
/jucs_18_20/the_forum_for_negative
page 2748 - 2749
Vol.18 / Issue 20
L. Prechelt:
Why We Need an Explicit Forum for Negative Results
/jucs_3_9/why_we_need_an
page 1074 - 1083
Vol.3 / Issue 9
A. Rosado-Muñoz, L. Gomez-Chova, L. Gomez-Chova, J. Vila Francés:
An IP Core and GUI for Implementing Multilayer Perceptron with a Fuzzy Activation Function on Configurable Logic Devices
/jucs_14_10/an_ip_core_and
page 1678 - 1694
Vol.14 / Issue 10
R. Santos, R. Azevedo, G. Araujo:
Instruction Scheduling Based on Subgraph Isomorphism for a High Performance Computer Processor
/jucs_14_21/instruction_scheduling_based_on
page 3465 - 3480
Vol.14 / Issue 21