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Yves Berviller
Université Henri Poincaré I, France
O. Pérez, Y. Berviller, C. Tanougast, S. Weber
:
The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation
/jucs_13_3/the_use_of_runtime
page 349 - 362
Vol.13
/
Issue 3
