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Topic B. - Hardware
Topic B.6 - LOGIC DESIGN
Topic B.6.2 - Reliability and Testing

R. Arora, M.S. Hsiao:
Using Global Structural Relationships of Signals to Accelerate SAT-based Combinational Equivalence Checking
/jucs_10_12/using_global_structural_relationships
page 1597 - 1628
Vol.10 / Issue 12
Editors:
Wotawa Franz