Mapping and Scheduling in Heterogeneous NoC through Population-Based Incremental Learning
Freddy Bolanos (Universidad Nacional de Colombia, Colombia)
Jose Edison Aedo (Universidad de Antioquia, Colombia)
Fredy Rivera (Universidad de Antioquia, Colombia)
Nader Bagherzadeh (University of California, Irvine, USA)
Abstract: Network-on-Chip (NoC) is a growing and promising communication paradigm for Multiprocessor-System-On-Chip (MPSoC) design, because of its scalability and performance features. In designing such systems, mapping and scheduling are becoming critical stages, because of the increase of both size of the network and application's complexity. Some reported solutions solve each issue independently. However, a conjoint approach for solving mapping and scheduling allows to take into account both computation and communication objectives simultaneously. This paper shows a mapping and scheduling solution, which is based on a Population-Based Incremental Learning (PBIL) algorithm. The simulation results suggest that our PBIL approach is able to find optimal mapping and scheduling, in a multi-objective fashion. A 2-D heterogeneous mesh was used as target architecture for implementation, although the PBIL representation is suited to deal with more complex architectures, such as 3-D meshes.
Keywords: computer-aided design (CAD), multiprocessor-system-on-chip (MPSoC), network-on-chip (NoC), population-based incremental learning (PBIL)
Categories: C.1.2, I.2.6, J.6